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IRF840AS, IRF840AL, SiHF840AS, SiHF840AL
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 38 9.0 18 Single
D
FEATURES
500 0.85
* Low Gate Charge Qg Results in Simple Drive Requirement * Improved Gate, Avalanche and Dynamic dV/dt Ruggedness * Fully Characterized Capacitance and Avalanche Voltage and Current * Effective Coss Specified * Lead (Pb)-free Available
Available
RoHS*
COMPLIANT
I2PAK (TO-262)
D2PAK (TO-263)
APPLICATIONS
* Switch Mode Power Supply (SMPS) * Uninterruptible Power Supply * High Speed Power Switching
G G D S S N-Channel MOSFET
TYPICAL SMPS TOPOLOGIES
* Two Transistor Forward * Half Bridge * Full Bridge
ORDERING INFORMATION
Package Lead (Pb)-free SnPb Note a. See device orientation. D2PAK (TO-263) IRF840ASPbF SiHF840AS-E3 IRF840AS SiHF840AS D2PAK (TO-263) IRF840ASTRLPbFa SiHF840ASTL-E3a IRF840ASTRLa SiHF840ASTLa D2PAK (TO-263) IRF840ASTRRPbFa SiHF840ASTR-E3a IRF840ASTRRa SiHF840ASTRa I2PAK (TO-262) IRF840ALPbF SiHF840AL-E3 IRF840AL SiHF840AL
ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise noted
PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb EAS IAR EAR TC = 25 C TA = 25 C PD dV/dt TJ, Tstg for 10 s Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc, e Operating Junction and Storage Temperature Range Soldering Temperature Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 C, L = 16 mH, RG = 25 , IAS = 8.0 A (see fig. 12). c. ISD 8.0 A, dI/dt 100 A/s, VDD VDS, TJ 150 C. d. 1.6 mm from case. e. Uses IRF840A/SiH840A data and test conditions. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91066 S-81412-Rev. A, 07-Jul-08 www.vishay.com 1 VGS at 10 V TC = 25 C TC = 100 C SYMBOL VDS VGS ID IDM LIMIT 500 30 8.0 5.1 32 1.0 510 8.0 13 125 3.1 5.0 - 55 to + 150 300d W/C mJ A mJ W V/ns C A UNIT V
IRF840AS, IRF840AL, SiHF840AS, SiHF840AL
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER Maximum Junction-to-Ambient (PCB Mount)a Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJC MIN. TYP. MAX. 40 1.0 UNIT C/W
Note a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS TJ = 25 C, unless otherwise noted
PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs
VGS = 0 V, ID = 250 A Reference to 25 C, ID = 1 mAd VDS = VGS, ID = 250 A VGS = 30 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 C VGS = 10 V ID = 4.8 Ab VDS = 50 V, ID = 4.8 A
500 2.0 3.7
0.58 -
4.0 100 25 250 0.85 -
V V/C V nA A S
Ciss Coss Crss Coss Coss Coss eff. Qg Qgs Qgd td(on) tr td(off) tf
VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V, f = 1.0 MHz VGS = 0 V VDS = 400 V, f = 1.0 MHz VDS = 0 V to 480 Vc, d
-
1018 155 8.0 1490 42 56
pF
VGS = 10 V ID = 8.0 A, VDS = 400 V, see fig. 6 and 13b, d VDD = 250 V, ID = 8.0 A, RG = 9.1 , RD = 31 , see fig. 10b, d -
11 23 26 19
38 9.0 18 ns nC
-
422 2.0
8.0 A 32 2.0 633 3.0 V ns C
G
S
TJ = 25 C, IS = 8.0 A, VGS = 0
Vb
TJ = 25 C, IF = 8.0 A, dI/dt = 100 A/sb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. d. Uses IRF840A/SiHF840A data and test conditions
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Document Number: 91066 S-81412-Rev. A, 07-Jul-08
IRF840AS, IRF840AL, SiHF840AS, SiHF840AL
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
100
100
VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
10
10
TJ = 150 C
TJ = 25 C
1
1
4.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
0.1 0.1
0.1 4.0
V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0
VDS , Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
100
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
3.0
8.0 ID = 7.4A
2.5
10
2.0
1.5
4.5V
1
1.0
0.5
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
TJ , Junction Temperature ( C)
VDS , Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91066 S-81412-Rev. A, 07-Jul-08
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IRF840AS, IRF840AL, SiHF840AS, SiHF840AL
Vishay Siliconix
100
ISD , Reverse Drain Current (A)
C, Ca pac ita nc e(pF )
10
TJ = 150 C
1
TJ = 25 C
0.1 0.2
V GS = 0 V
0.5 0.8 1.1 1.4
VSD ,Source-to-Drain Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
8.0 ID = 7.4 A
100
VGS , Gate-to-Source Voltage (V)
16
VDS = 400V VDS = 250V VDS = 100V
OPERATION IN THIS AREA LIMITED BY RDS(on)
10us
I D , Drain Current (A)
10 100us
12
8
1ms 1 10ms
4
0 0 10 20
FOR TEST CIRCUIT SEE FIGURE 13
30 40 0.1
TC = 25 C TJ = 150 C Single Pulse
10 100 1000 10000
Q G , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
VDS , Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
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Document Number: 91066 S-81412-Rev. A, 07-Jul-08
IRF840AS, IRF840AL, SiHF840AS, SiHF840AL
Vishay Siliconix
VDS
8.0
RD
VGS RG
D.U.T. + - VDD
I D , Drain Current (A)
6.0
10 V
Pulse width 1 s Duty factor 0.1 %
4.0
Fig. 10a - Switching Time Test Circuit
2.0
VDS 90 %
0.0 25 50 75 100 125 150
TC , Case Temperature
( C)
10 % VGS td(on) tr td(off) tf
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 P DM t1 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 0.001 0.01 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.1 1
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91066 S-81412-Rev. A, 07-Jul-08
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IRF840AS, IRF840AL, SiHF840AS, SiHF840AL
Vishay Siliconix
15 V
VDS
L
Driver
RG 20 V tp
D.U.T. IAS 0.01
+ A - VDD
Fig. 12a - Unclamped Inductive Test Circuit
VDS tp
Fig. 12d - Typical Drain-to-Source Voltage vs. Avalanche Current
IAS
QG
Fig. 12b - Unclamped Inductive Waveforms
V D S a v , A valan che V oltag e ( V )
10 V QGS
QGD
1200
EAS , Single Pulse Avalanche Energy (mJ)
TOP BOTTOM
1000
ID 3.6A 5.1A 8.0A
VG
Charge
800
Fig. 13a - Basic Gate Charge Waveform
600
Current regulator Same type as D.U.T.
400
50 k 12 V 0.2 F 0.3 F
200
+
D.U.T.
-
VDS
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
VGS
3 mA
IG ID Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
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Document Number: 91066 S-81412-Rev. A, 07-Jul-08
IRF840AS, IRF840AL, SiHF840AS, SiHF840AL
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
Circuit layout considerations * Low stray inductance * Ground plane * Low leakage inductance current transformer
+ +
-
RG
* * * *
dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test
+ VDD
Driver gate drive P.W. Period D=
P.W. Period VGS = 10 V*
D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt
VDD
Re-applied voltage Inductor current
Body diode forward drop
Ripple 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91066.
Document Number: 91066 S-81412-Rev. A, 07-Jul-08
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
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